1. Field of Invention
The present invention relates to an electronic component having inductors disposed in a dielectric substrate, which is made up of a plurality of laminated dielectric layers, and to a passive component utilizing such an electronic component. More particularly, the present invention concerns an electronic component and a passive component, which are suitable for use in a filter such as a low-pass filter, a bandpass filter, a high-pass filter, or the like, and a triplexer incorporating such a filter or the like.
2. Description of Related Art
Heretofore, electronic components have been known having inductors disposed in a dielectric substrate, which is made up of a plurality of laminated dielectric layers. Patent Documents 1 through 4, for example, have been proposed particularly for improving the Q factor of such inductors.
The electronic component disclosed in Patent Document 1 has three conductive patterns having substantially identical shapes disposed in a dielectric substrate, and which are laminated with dielectric layers sandwiched therebetween, the conductive patterns being electrically connected to each other to result in a single signal line. The resistive component of the signal line, which functions as an inductor, thus is reduced for improving the Q factor of the inductor.
Patent Document 2 discloses an example in which coil electrodes are disposed respectively on a plurality of certain dielectric layers in order to form a coil, the axis of which is substantially perpendicular to a direction in which the dielectric layers are stacked. In particular, Patent Document 2 discloses an example in which coil electrodes having identical patterns are disposed on a plurality of dielectric layers. According to the laminated coil component disclosed in Patent Document 2, it is possible to prevent spaced intervals between adjacent via holes, which are arrayed along the axis of the coil, from becoming reduced, while at the same time increasing the volume of each of the via holes.
Patent Document 3 discloses a coil formed by stacking two spiral coil patterns having essentially identical shapes, which are disposed in a dielectric substrate with a dielectric layer sandwiched therebetween, and electrically connecting the coil patterns. Such an in-substrate layer coil, as disclosed in Patent Document 3, is small in size and has a high Q factor.
Patent Document 4 discloses a first coil formed by stacking two first coil patterns having essentially identical shapes, which are disposed in a dielectric substrate with a dielectric layer sandwiched therebetween, and electrically connecting the first coil patterns. Patent Document 4 also discloses a second coil formed by stacking two second coil patterns having essentially identical shapes below the first coil with a dielectric layer sandwiched therebetween, and electrically connecting the second coil patterns. The laminated inductor disclosed in Patent Document 4 makes it possible to minimize conductor loss without causing insulating layers to peel off, and also without increasing the planar area of the substrate.
Patent Document 1: Japanese Laid-Open Patent Publication No. 11-186038
Patent Document 2: International Publication No. 2005/024863
Patent Document 3: Japanese Laid-Open Patent Publication No. 06-140250
Patent Document 4: Japanese Laid-Open Patent Publication No. 08-186024